|Marketed by||Cyrix, Texas Instruments|
|Max. CPU clock rate||20 MHz to 50 MHz|
|FSB speeds||20 MHz to 40 MHz|
|Architecture and classification|
The Cyrix Cx486SLC is a x86 microprocessor that was developed by Cyrix. It was one of Cyrix's first CPU offerings, released after years of selling math coprocessors that competed with Intel's units and offered better performance at a comparable or lower price. It was announced in March of 1992, and released 2 months later in May, with a price of $119. It was priced competitively against the Intel 486SX, causing Intel to lower the price of their chip from $286 to $119 in just days.
The 486SLC is based on the i386SX bus, and was intended as an entry-level chip to compete with the Intel 386SX and 486SX. SGS-Thomson and Texas Instruments manufactured the 486SLC for Cyrix. Texas Instruments also sold it under its own name as TX486SLC. Later, Texas Instruments also released their own version of the chip, the TI486SXLC which featured 8KB internal cache vs 1KB in the original Cyrix design. These chips went under the name Potomac, and Cyrix would receive full royalties for them. The similarly named IBM 486SLC, 486SLC2, 486SLC3 (16-bit external bus version of IBM 486DLC aka Blue Lightning) and IBM 386SLC are often confused with the Cyrix chips, but are not related and instead based on an Intel CPU core.
Introduced in May 1992, like the later and more famous Cyrix Cx5x86 it was a hybrid CPU, incorporating features of a new CPU (in this case the Intel 80486) while having a pin out similar to the existing 386SX, enabling existing board designs to be easily modified for the new chip. It ran at speeds of 20, 25, 33, and 40 MHz, although it had difficulty running reliably at 40 MHz using some operating systems. In December 1992 Cyrix also released the Cyrix Cx486SLC/e (25, 33 MHz) which offered power management, and a low voltage laptop version, the 3.3v Cyrix Cx486SLC/e-V (20, 25 MHz). In December 1993 Cyrix released a clock doubled version (25/50 MHz) cx486SLC2, as well as a clip-on upgrade for 386SX systems, the cx486SRx2 (16/33, 20/40 & 25/50 MHz).
The 486SLC can be described as a 386SX with the 486 instruction set and 1K of onboard L1 cache added. Unfortunately it inherited the 386SX's 24-bit address bus (16 MB max. DRAM), and 16-bit datapath which limited its memory bandwidth. Like the 386 and 486SX, it had no on-board math coprocessor, but unlike the 486SX, it could make use of an Intel 287, 387SX or compatible x87 coprocessor. Due to the limitations of the 386SX's bus and its smaller L1 cache, its performance could not compete with the 486SX when the latter was running on a full 32-bit bus.
The 486SLC was primarily used in very inexpensive low-end motherboards and PC clones. Because of its low power consumption, it also saw use in laptops. The 486SLC was also available as a 32-bit version based on the i386DX bus, see 486DLC.
Cyrix Cx486SLC with 87SLC co-processor (top view)
Cyrix Cx486SLC with 87SLC co-processor (bottom view)
The base 486SLC, which had speeds of 20, 25, 33, and 40 MHz with 1 KB of cache and a 16-bit bus. A later version, the 486SLC2, ran at 50 MHz.
|Cx486SLC-20||20 MHz||20 MHz||1 KB||5V||100-pin QFP package.|
|Cx486SLC/E-V20||20 MHz||20 MHz||1 KB||3.3V||Advanced power management, low voltage, 100-pin QFP package.|
|Cx486SLC-25MP||25 MHz||25 MHz||1 KB||5V||100-pin QFP package.|
|Cx486SLC/E-25-MP||25 MHz||25 MHz||1 KB||5V||Advanced power management, 100-pin QFP package.|
|Cx486SLC/E-25-QP||25 MHz||25 MHz||1 KB||5V||Advanced power management, 100-pin QFP package.|
|Cx486SLC/E-V25MP||25 MHz||25 MHz||1 KB||3.3V||Advanced power management, low voltage, 100-pin QFP package.|
|Cx486SLC-33MP||33 MHz||33 MHz||1 KB||5V||100-pin QFP package.|
|Cx486SLC/E-33-MP||33 MHz||33 MHz||1 KB||3.3V||Advanced power management, 100-pin QFP package.|
|Cx486SLC/E-40-MP||40 MHz||40 MHz||1 KB||5V||Advanced power management, 100-pin QFP package.|
|Cx486SLC2-50||25 MHz||50 MHz||1 KB||5V||100-pin QFP package.|
TI's rebranded version of the Cx486SLC.
|TI486SLC/E||25 MHz||25 MHz||1 KB||5V||Advanced power management, 100-pin QFP package.|
|TI486SLC/E-33PAF||33 MHz||33 MHz||1 KB||5V||Advanced power management, 100-pin QFP package.|
|TI486SLC/E-V||25 MHz||25 MHz||1 KB||3V||Advanced power management, low voltage, 100-pin QFP package.|
The TI486SXLC/SXLC was Texas Instrument's version of the Cx486SLC. They had 8 KB of cache over the original 1 KB, a 32-bit internal data bus, and supported clock-doubling.
|TI486SXLC-V25-PJF||25 MHz||25 MHz||8 KB||3.3V||Low power version of SXLC, 100-pin QFP for compatibility with 486SLC.|
|TI486SXLC-040-PJF||20-40 MHz†||40 MHz||8 KB||5V||100-pin QFP for compatibility with 486SLC.|
|TI486SXLC2-050-PJF||25 MHz||50 MHz||8 KB||5V||100-pin QFP for compatibility with 486SLC.|
|† - Can operate at nonclock-doubled 40 MHz or clock-doubled 20/40 MHz.|
|Cx486SRx2-25/50||25 MHz||50 MHz||1 KB||3.3V||Clip-on upgrade version of the SLC, compatible with the 386SX-16, 20, or 25 MHz.|
Intel v. Cyrix lawsuit
Before even announcing the chip in March of 1992, Intel filed a lawsuit against Cyrix for patent infringement. Prior to this, Cyrix asked for a declaratory judgement that would prevent Intel from suing Cyrix. Texas Instruments joined the suit shortly after with an intervene, siding with Cyrix.
Cyrix used SGS-Thomson as a second manufacturer of the chip, as the company had license to use Intel's patents. Intel however claimed the licence SGS-Thomson had was never intended to allow companies like Cyrix to circumvent Intel patents, which Intel stated was "patent laundering".
The lawsuit, which concluded in 1994, stated:
Cyrix is entitled to judgment in its favor on its affirmative defenses of patent exhaustion and implied license based on the use or resale of its claim 1 microprocessors purchased from TI and ST.
- Cyrix Cx486DLC - Cyrix's next CPU offering, released in June of 1992.
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